A semiconductor device may include a silicon carbide (SiC) drift layer (also may be referred to as an epitaxial silicon carbide layer, and so on), and the silicon carbide drift layer may have (or be with, comprise, include, and so on) a first conductivity type, such as N type (or may be referred to as n-doping).
Moreover, the semiconductor device may include a buried silicon carbide layer (also may be referred to as an edge termination region, and so on), and the buried silicon carbide layer is located within the silicon carbide drift layer. The buried silicon carbide layer may have (or be with, comprise, include, and so on) a second conductivity type, such as P type (or may be referred to as p-doping).
In some scenarios, the buried silicon carbide layer may be covered by a silicon carbide surface layer. For example, an upper surface of the buried silicon carbide layer is covered by the silicon carbide surface layer and other surfaces (such as a lower surface and four side surfaces) of the buried silicon carbide layer are located within the silicon carbide drift layer.
Therefore, electric field in an operating state is reduced toward edge of the semiconductor device, due to the buried silicon carbide layer. Furthermore, an oxidation of the buried silicon carbide layer may be avoided by covering with the silicon carbide surface layer. In this way, breakdown behavior and/or long-time reliability of the semiconductor device may be improved.
This section introduces aspects that may facilitate a better understanding of the disclosure. Accordingly, the statements of this section are to be read in this light and are not to be understood as admissions about what is in the prior art or what is not in the prior art.